The present invention relates to a soft programming method of a non-volatile memory device.
Recently, there has been an increasing demand for non-volatile memory devices which can be electrically programmed and erased and do not require a refresh function of rewriting data at regular intervals.
A non-volatile memory device generally includes a memory cell array in which cells for storing data are arranged in a matrix form, and a page buffer for writing memory into a cell of the memory cell array or reading memory stored in a cell. The page buffer includes a bit line pair connected to a memory cell, a register for temporarily storing data to be written into the memory cell array, or reading data of a cell from the memory cell array and temporarily storing the read data, a sense node for sensing a voltage level of a bit line or a register, and a bit line selection unit for controlling whether a bit line is connected to the sense node.
Each memory cell of the non-volatile memory device is a device that enables an electrical program and erase operation, and is configured to perform a program and erase operation by changing the threshold voltage of a cell while electrons are moved by a strong electric field applied to a thin oxide layer of about 100 angstroms (hereinafter, referred to as a “tunnel oxide layer”).
After an erase operation is performed on the non-volatile memory device, in order to improve distributions of the threshold voltage of the cells, a soft programming operation is performed to raise the threshold voltage of an erase cell. During this soft programming operation, the threshold voltage of the erase cell is further raised because of a Back Pattern Dependence (BPD) effect, FG coupling, a program disturbance phenomenon and/or an interference phenomenon. This results in reduced read margin. The phenomena are particularly severe in cells adjacent to a drain select transistor.